In other prior art, a widely used method to pattern a substrate with beams also is a raster scan. In order to accurately write the pattern on the substrate, the pattern is rasterized. Each charged particle beam performs its writing operation on a substrate to be patterned, which is positioned on a motor driven stage that is moved in a continuous way. At the same time the beam is scanned in a direction perpendicular to the stage motion. By supplying the writing information to the beam at right times, a pattern is written on a grid, which does not necessarily needs to be a Cartesian grid. A major problem in this art is that a feature can only be positioned within the dimension of a single grid cell. Issuing pattern design rules does not solve this problem, since before exposure, a pattern design needs to be corrected for several resolution-disturbing phenomena, like the proximity effect. These corrections can shift the edges of a feature away from a grid line.
A method towards improved accuracy of writing developed in the prior art of multi beam lithography systems is known from U.S. Pat. No. 5,103,101, in which a pattern is written by employing multiple passes. The pattern is first rasterized. After rasterization the pixels are separated in a selectable number of “phases”. Each phase is printed in a separate raster scan. This results in the selected number of raster scans to construct the feature. Since the pitch between pixels is enlarged in two directions each scan can be performed at a higher speed. Thus, in this approach a pattern is partly written during a first exposure. The entire grid is shifted within the dimensions of a single grid cell and then a second part of the pattern is written. In this manner a feature edge can thus be positioned twice as accurate as before. By employing even more passes, a more accurate pattern placement can be obtained. A rather important disadvantage of this approach is the considerable loss of throughput implied by the multiple passes, especially at increased levels of accuracy.
Another known technique applying a raster, is known as grey writing, and for instance described in early U.S. Pat. No. 5,393,987. In this approach a relatively small number of grid cells is used. However, the applied dose within each grid cell is varied, e.g. to 0%, 30%, 70% and 100% by varying a duration of illumination. The 30% and 70% pixels are used along the edge of a feature, so as to locate the edge when written between the lines of a Cartesian raster. As a result, the position of a feature can be accurately tuned “without the need for multiple passes”. Moreover, less data is needed to provide the same result. This known technique and system however, goes along with several disadvantages. E.g., the dose levels are created either by partial blanking or by controlling the exposure time. In such a set up, the required control of the discrete steps needs to operate in an extremely accurate way. Especially for high throughput applications such a requirement results in highly difficult designs for the lithography system, and correspondingly high costs thereof. Additionally the yield of such a system may suffer considerably. A single bit error in the pattern control data has a relatively large impact on the relevant exposure in the system, due to the relatively large grid dimensions. As a result a relatively high degree of processed substrates like masks or wafers, runs a risk of requiring to be repaired, or worse, of becoming destroyed, i.e. becoming irreparable.
Yet another method and machine designed towards overcoming the limitations of a raster or grid system is referred to by the term virtual addressing, and is for instance disclosed in U.S. Pat. No. 4,498,010. According to this system, in which the dimension of a grid cell is equalised to that of the probe size, an edge of a feature can be positioned halfway between two grid lines by writing additional pixels either before or after the selected feature, thus blanking the beam in alternating probe positions. This method, be it to the detriment of edge smoothness of a written feature, reduces the positioning error of the system, and favourably maintains throughput thereof. However, the system is limited to one particular distance of displacement of an edge, namely half the dimension of a grid cell, which in this system corresponds to half of a probe size, which in practice not only means that extension of positioning locations is limited to a single location halfway a pixel, but also, as the publication indicates, that such a shifted edge will be rather crude in shape. Not being related to a contemporary system with probe sizes significantly larger than pixel size, this known system neither teaches how to realise virtually infinite sub-pixel placement of smooth edges.
In a combination of a so-called vector scan writing strategy and a raster scan strategy as disclosed in US2002/0104970, the pattern to be written is rasterized and a group of pixels is combined, thereby forming a cell. Within this cell a finite number of possible pattern configurations is available. Each available configuration is given a shape code. The pattern is subsequently written by flashing each cell at a desired location, while moving from position to position in a raster scan way. The position of the edges can be tuned with respect to the grid of the rasterization by applying the right shape codes. Thus it could be stated that this particular patent publication discloses a form of grey writing using patterned cells. Apart from the fact that only a limited number of cell-configurations is used, it may be evident that such concept is not based on the contribution of single pixels as is dealt with in the lithography system under consideration.
The present invention aims at overcoming the restrictions imposed by a rastering method on positioning features on a substrate as in the prior art or, alternatively posed is directed to virtually independently from such raster or grid, positioning the edge of a feature at a desired location. More in particular such is aimed for at least virtually without loss in throughput of the lithography system, with maintenance of a relatively very fine grid structure, while employing a conventional black and white writing strategy, and virtually without reduction in edge smoothness of a feature. With such a probe forming lithography system in which in fact positioning of a feature is no longer, at least hardly limited to the finite size of a grid cell of to the half size thereof, a highly advanced critical dimension control is to be attained, more in particular even in a relatively economic manner, which critical dimension control renders a virtually unhampered placement possibility of edges on a target, virtually independent of an applied grid.